Driving an analog power amplifier with a binary stimulus is a promising approach for increasing the power added efficiency due to, ideally lossless, switching. Unfortunately, practical implementations suffer from several device imperfections, making these concepts very difficult to implement. To tackle all those problems, a holistic approach is required. Only by understanding the impact of digital modulation parameters onto the analog power device, a linear and efficient amplification becomes possible.

Broadband Class-F Amplifiers

Building an energy-efficient power amplifier for digitally driven amplifiers is challenging. Narrowband high efficiency concepts (e.g. class-F amplifiers) cannot be used as the digital stimulus has a bandwidth of 100 MHz and more. One solution is the design of continuous mode class-F power amplifiers. By either using a transistor model or load-pull measurement data, optimum loads for the fundamental and harmonic frequencies can be determined. To realize them in hardware, the simplified real-frequency technique (SRFT) can be applied. Here, the optimum matching networks are synthesized as series-connected transmission lines.

© Holger Arthaber

Broadband Class-F amplifier, Schematic

^{Broadband Class-F amplifier, Schematic}

© Holger Arthaber

Broadband Class-F amplifier

^{Broadband Class-F amplifier}

Load-Pull based Optimization of an SMPAs Power Consumption

For an improved efficiency on digitally driven power amplifiers, it can be proven that the out-of-band terminations have a strong influence. By using extensive load-pull measurement campaigns, the optimum loads (i.e. lowest drain current) for a digital stimulus can be found. By extending the simplified real-frequency technique to favor a joint optimization of the optimum loads for power-efficient in-band operation and those for out-of-band, the overall efficiency can be increased.

© Holger Arthaber

Current consumption optimization, Drain current for different reflection coefficients

^{Current consumption optimization, Drain current for different reflection coefficients}

© Holger Arthaber

Current consumption optimization, Optimized load trajectory

^{Current consumption optimization, Optimized load trajectory}

Quadrature Sigma-Delta Pulse Width Modulation

The design of the digital modulator has a strong impact onto the analog power amplifier´s efficiency. While sigma-delta modulators achieve high coding efficiencies, the digital output signal looks rather random with its power spread over a very wide bandwith. This makes it impossible to apply highly efficient power amplifier concepts like class-F. Thus, the Microwave Engineering Group decided to go for a pulse width modulation based modulator. This generates a digital output signal consisting of long bursts of the targeted carrier frequency, thus allowing using class-F amplifiers. Research focuses on finding the optimum balance between digital coding efficiency and analog power amplifier efficiency.

© Holger Arthaber

Quadrature sigma-delta pulse width modulation driven power amplifier

^{Quadrature sigma-delta pulse width modulation driven power amplifier}

Full Bandwidth Modeling of Digitally Driven SMPAs

During the design of efficient RF power amplifiers, knowledge of the output waveforms is essential. While this is a simple to tackle problem for analog and linear amplifiers, it is rather challenging for digitally driven amplifiers: Their nonlinearity is difficult to describe and they show a rather long nonlinear memory. While systems with digital input often use table-based models, the long nonlinear memory results in memory requirements beyond what is possible with nowadays personal computers.

By analyzing the properties of digital excitation signal (i.e. its bursted nature), repetitive binary sequences can be identified. This allows a further reduction of the model´s memory demands by several orders of magnitude. Further identifying sequences which result in long memory and representing the waveforms by a tree-structure with different branch lengths, an optimum model for a given memory size can be derived.

© Holger Arthaber

LUT based modeling of a digitally driven SMPA, Basic symbols

^{LUT based modeling of a digitally driven SMPA, Basic symbols}

© Holger Arthaber

LUT based modeling of a digitally driven SMPA, Modeling performance for different memory lengths

^{LUT based modeling of a digitally driven SMPA, Modeling performance for different memory lengths}