Gate stack engineering for nanoscaled FETs

To allow for further scaling of field effect transistors (FETs), two-dimensional (2D) materials have been investigated for their use as channel materials. The central impact of the gate dielectric on MOSFET performance has not received the required attention so far [1]. A good dielectric has a clean and inert interface, a large dielectric constant, a large band gap and very few electrically active defects. The layered structure of 2D materials allows for arbitrary combinations of semiconductors and dielectrics, which opens up many new possibilities. Recently we have obtained very promising results using calcium fluoride (CaF2) as a gate dielectric in combination with molybdenum disulfide (MoS2) channel [1], see Figure. Other interesting options are native insulators, which are obtained via the oxidation of 2D semiconductors, like TaS2 into Ta2O5 or HfSe2 and HfS2 info HfO2 or Bi2O2 Se into Bi2SeO5 , or layered materials like mica and perovskites.

The image shows a schematic drawing of a metall-oxide-semiconductor field effect transistor.

© Tibor Grasser

(a) Schematic drawing of a MOSFET using CaF2 as a gate dielectric and MoS2 as a channel material. (b) Hysteresis in the transfer characteristics measured on devices with different gate dielectrics. (c) comparison of the hysteresis for FETs with different material combinations [1].


We will compare alternative insulators to CaF 2 when used in 2D devices. We will model their properties using DFT to identify which 2D semiconductors result in oxides with the best properties, e.g. band gap and permittivity, in collaboration with Madsen. The most promising materials will be oxidized in our cleanroom (Weber) while layered materials will be exfoliated (Müller). Then these insulators will be used to first fabricate back-gated and then top-gated FETs (Weber, Müller). The surfaces of these insulators will be characterized by Diebold and Foelske, while the FETs will be electrically characterized in our lab. Finally, the performance of these devices will be electrically modeled in collaboration with Libisch and compared to experiment. These results will allow us to find the optimum material combinations for superior device performance.


Characterization of these FETs will be performed over a wide temperature range (4 K to 500 K). The obtained data will help to improve our models for the current flow in the devices [2], which will be extended to accurately describe the trap assisted gate current. A focus will be put on characterizing single defects in ultra-scaled gate stacks by evaluating random telegraph noise [3] and by performing time-dependent defect spectroscopy [4]. The defect characterization will be used to extract capture and emission time constants which will be related to the defect properties calculated with DFT and obtained from scanning tunneling microscopy on the surface of the dielectrics.


The group of Mueller will fabricate exfoliated FETs, while the group of Weber will focus in native oxides. The group of Grasser will focus on device characterization and modeling using drift diffusion and Boltzmann transport equation codes. The Libisch group will perform fully quantum-mechanical transport simulations. Foelske will provide defect profiles of the insulator films using angle-resolved XPS, Diebold using scanning tunneling microscopy and Madsen by means of DFT.


Tibor Grasser’s group focuses on the impact of defects on the characteristics of nanoelectronic devices. The reliability and variability of field effect transistors (FETs) is measured over a wide temperature range (from 4 K to 650 K). Device and ab-initio modeling link the observed phenomena to their root cause, atomic defects. In numerous studies on FETs in Si, SiC, GaN and 2D materials, Grasser developed a large tool box for analyzing the dominant defects in FETs including measurements [3,4] and theory [5]. The aim is improving the reliability and variability of devices using Van der Waals heterostructures.


Group of Prof. Grasser, opens an external URL in a new window


  1. Y. Y. Illarionov, A. G. Banshchikov, D. K. Polyushkin, S. Wachter, T. Knobloch, M. Thesberg, L. Mennel, M. Paur, M. Stöger-Pollach, A. Steiger-Thirsfeld, M. I. Vexler, M. Waltl, N. S. Sokolov, T. Mueller, and T. Grasser. Ultrathin calcium fluoride insulators for two-dimensional field-effect transistors. Nature Electronics 2, 230–235 (2019). DOI: 10.1038/s41928-019-0256-8.
  2. T. Knobloch, G. Rzepa, Y. Y. Illarionov, M. Waltl, F. Schanovsky, B. Stampfer, M. Furchi, T. Mueller, and T. Grasser. A Physical Model for the Hysteresis in MoS 2 Transistors. IEEE Journal of the Electron Devices Society 6, 972–978 (2018). DOI: 10.1109/JEDS.2018.2829933.
  3. B. Stampfer, F. Zhang, Y. Y. Illarionov, T. Knobloch, P. Wu, M. Waltl, A. Grill, J. Appenzeller, and T. Grasser. Characterization of single defects in ultrascaled MoS 2 field-effect transistors. ACS Nano 12, 5368–5375 (2018). DOI: 10.1021/acsnano.8b00268.
  4. T. Grasser, H. Reisinger, P.-J. Wagner, and B. Kaczer. Time-dependent defect spectroscopy for characterization of border traps in metal-oxide-semiconductor transistors. Physical Review B 82 (2010). DOI: 10.1103/physrevb.82.245318.
  5. A. M. El-Sayed, Y. Wimmer, W. Goes, T. Grasser, V. V. Afanas’Ev, and A. L. Shluger. Theoretical models of hydrogen-induced defects in amorphous silicon dioxide. Physical Review B -Condensed Matter and Materials Physics 92, 1–11 (2015). DOI: 10.1103/PhysRevB.92.014107.