Most HPC systems are clusters of shared memory nodes. Such SMP nodes can be small multi-core CPUs up to large many-core CPUs. Parallel programming may combine the distributed memory parallelization on the node interconnect (e.g., with the Message Passing Interface - MPI) with the shared memory parallelization inside of each node. This course analyses the strengths and weaknesses of several parallel programming models on clusters of SMP nodes. Tools for hybrid programming such as thread/process placement support and performance analysis are presented in a "how-to" section.
The first day is dedicated to the theory. The second day provides hands-on exercises.
This course is organized by the <link http: vsc.ac.at training _blank>Vienna Scientific Cluster (VSC) at TU Wien in cooperation with the <link https: www.hlrs.de training>High-Performance Computing-Center Stuttgart (HLRS) and the <link https: www.rrze.fau.de _blank>Erlangen Regional Computing Center (RRZE).
All information about the course as well as a detailed agenda and the registration link can be found in the links below from the website of the <link https: cec.tuwien.ac.at seminare spezialseminare _blank>Continuing Education Center (CEC) of TU Wien and from the course program of the <link http: vsc.ac.at training _blank>Vienna Scientific Cluster (VSC):
06.-07.06.2018 (09:00-17:00) VSC Training Course: Introduction to Hybrid Programming in HPC
Information: <link https: cec.tuwien.ac.at seminare spezialseminare vsc_introduction_to_hybrid_programming_in_hpc _blank>CEC-link or <link http: vsc.ac.at training courses hy-vsc _blank>VSC-link
Registration for the course is still open, please register soon to secure your spot!
All training events of VSC: vsc.ac.at/training, opens an external URL in a new window
All pictures: VSC