Supervisor: Muhammad Shafique
Efficient Hardware Security for Emerging Embedded Systems: Attacks and Defenses
The exponential increase in using emerging embedded systems for critical applications (i.e., surveillance systems) makes these systems vulnerable to several security threats, e.g., remote micro-architectural attacks. Therefore, security emerges as a major parameter that needs to be studied along with performance constraints. However, works in the security of embedded systems have been mostly focused on chip modification and physical side channel exploitation. At the same time, software-exploitable side-channel attacks can remotely leak confidential information from trusted hardware with high bandwidth micro-architectural channels. These attacks exploit the shared resources like last level cache, which are inevitable in the high performance emerging embedded systems. There are efforts to mitigate these micro-architectural attacks, but these defenses possess high energy consumption, low resolution of software defenses for hardware events and are limited known attacks. To tackle the challenges, we aim to propose a defense mechanism against software-exploitable side-channel attacks for emerging embedded systems (like RISC-V CPUs) under the given design-constraints (e.g., energy constraints) of IoT devices in real-world settings (e.g., Noisy environment). Emerging embedded systems utilized in Internet-of-Things (IoT) are not limited to CPU-based edge and fog devices. FPGA-based clouds are also employed as reconfigurable accelerators for critical applications like cryptography algorithms. Therefore, it is essential to study their vulnerabilities against remote side-channel attacks. Current defenses against remote side channel attacks in FPGA-based cloud servers are not sufficient because cloud-providers can not ensure the confidentiality of multi-tenant FPGAs. To ensure the secure cloud-based IoT applications, we intend to propose an efficient defense mechanism that protects the leakage of encrypted data to malicious tenants.