European Project IRIS (Integrated Reconfigurable Silicon Photonic Switch)
Integrated Pulsewidth Modulation Control for a Scalable Optical Switch Matrix
A scalable pulsewidth control approach with 7-bit resolution for thermal control of optical ring resonator switch matrices in 0.16-μm Bipolar-CMOS-DMOS (BCD) with a cell size of 79 x 105μm2 is introduced. One Gray counter at up to 1.2-GHz clock and pulsewidth modulation generation in each matrix cell leads to an electrical power consumption of 330 mW for all electronic control circuits of an optical 1000-switch-node matrix, resulting in a reduction of 11.1% of the power needed by a constant-voltage control approach.
- 826 tunable heaters
- 84 monitoring Transimpedance Amplifiers (TIAs)
- More than 2000 copper pillars as connections between 3D-integrated EIC&PIC
Publications: IEEE Photonics J., IEEE JSTQE, Electron. Lett., IEEE PTL
Project partner: Ericsson Telecomunicazioni SpA, STMicroelectronics srl, Commissariat à l’Energie Atomique et aux Energies Alternatives (CEA-LETI), Consorzio Nazionale Interuniversitario per le Telecomunicazioni, Universidad Politecnica de Valencia, Università degli Studi di Trento, Electronics and Telecommunications Research Institute
- 8x receiver and 8x transmitter on one chip
- Photonic/electronic integration with inter-wafer connections (IWCs)
- RX: -27dBm @ 10Gb/s per channel
- TX: Ringmodulators, 10Gb/s 4-PAM and binary, each
Project partner: AIT, ams AG (AMS), LANTIQ A GmbH (LTQ), Commissariat à l'energie atomique (CEA-LETI)
10Gb/s-Receiver 8 channel (European Project HELIOS)
An 8x10Gb⁄s parallel single-chip light-to-logic converter [Optics Comm. 2011]
An 8x10 Gbps direct light-to-logic converter for hybrid mounted Ge photodiodes is presented. The receiver is realized in standard 0.35 μm SiGe BiCMOS technology and the GE photodetector is directly mounted on the top of the CMOS wafer. Each of the 8 channels includes a transimpedance amplifier, limiting amplifier stages and a 50 kΩ CML output driver. The overall transimpedance is 275 kΩ CML output driver. The overall transimpedance is 275 kΩ and at a data rate of 10 Gpbs a sensitivity of -23.1 dBm (BER=10-9) is reached.
10Gb⁄s 5Vpp and 5.6Vpp drivers implemented together with a monolithically integrated silicon modulator in 0.25 μm SiGe:CBiCMOS [Optics Comm. 2015]
Two modulator drivers in 0.25 μm SiGe:CBiCMOS, which are integrated each together with a Mach-Zehnder modulator for electro-optical modulation (optical C-band) are presented. The fully integrated modulator occupies an area of 12.3mm2. Carrier depletion in reverse biased pn junctions is used to adjust the refractive index in both arms of the Mach–Zehnder modulator (dual-drive configuration). The first integrated driver has a low power consumption of 0.68W but a high gain of S21=37dB and delivers an inverted as well as a non-inverted output data signal between 0V and 2.5V (5Vpp differential). The driver circuit is supplied with 2.5V and at the output stage with 3.5V. Bit-error-ratio (BER) measurements with a pseudo-random-bit-sequence (PRBS 231-1) resulted in a BER better than 10-12 for input voltage differences down to 50mVpp. A second adapted driver is supplied with 2.5V and 4.2V, consumes 0.87W and delivers a differential data signal with 5.6Vpp having a gain of S21=40dB. The fully integrated modulator achieved at an optical wavelength of 1540nm and 10Gb/s datarate an extinction ratio of 3.3dB for a 1mm long modulator (VπLπ≈2Vcm) with driver variant 1 and 8.4dB for a 2mm long modulator with driver variant 2.